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Embedded
Design Using Programmable Gate Arrays
Dennis
Silage silage@temple.edu
astro.temple.edu/~silage
Bookstand Publishing 2008, ISBN 978-1-58909-486-4, 320 pages with downloadable
complete Xilinx ISE WebPACK project files. Text announcement can be
download here.
This text is intended as a supplementary text and laboratory manual for undergraduate students in a contemporary course in digital logic and embedded systems. Professionals who have not had an exposure to the fine grained FPGA, the Verilog HDL, an EDA software tool or the new paradigm of the controller and datapath and the FSM will find that this text and the Xilinx Spartan-3E Starter Board provides the necessary experience in this emerging area of electrotechnology.
Embedded Design Using Programmable Gate Arrays describes the analysis and design of modern embedded systems using the field programmable gate array (FPGA). The FPGA has traditionally provided support for embedded design by implementing customized peripherals and controller and datapath algorithmic state machines. Although microprocessor-based computer systems have usually been used for the design of larger scale embedded systems, the paradigm of the FPGA now challenges that notion of such a fixed architecture especially with the constraints of real-time.
This new paradigm in embedded system design machine describes the Verilog behavioral synthesis of finite state machine as a controller and datapath architecture in digital signal processing (DSP), digital communications, digital control and data communication utilizing the FPGA, the integration of external interface hard peripherals and the implementation of a custom internal soft core peripherals and soft core processors.
The transition to embedded system design now in the massively parallel and fine grained architecture of the modern FPGA is described in-part by the translation of C/C++ program segments for real-time processing to a controller and datapath architecture or an algorithmic state machine. However, the emergence of the Xilinx 8-bit PicoBlaze and 32-bit MicroBlaze soft core processors now also challenges the conventional microprocessor with its fixed architecture for embedded system design.
Embedded Design Using Programmable Gate Arrays features the Xilinx Spartan-3E™ FPGA and the Digilent Basys Board and the Spartan-3E Starter Board, the Xilinx Integrated Synthesis Environment (ISE) WebPACK design environment in Verilog HDL, the Xilinx CORE Generator for LogiCORE Verilog modules and the Xilinx Embedded Development Kit (EDK) for the Xilinx 8-bit PicoBlaze soft core processor. The complete Xilinx ISE WebPACK Verilog source code modules for the projects delineated in the text and executing on the the Spartan-3E Starter Board are provided for download. A limited number of Xilinx ISE WebPACK projects can execute on the less expensive Diligent Spartan-3E Basys Board (www.digilentinc.com)
An excerpt from the text entitled DSP on the Spartan-3E Starter Board was published on Programmable Logic Design Line (www.pldesignline.com) and available for download here.
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Purchase
The text can be purchased at Bookstand Publishing Announcement The text announcement can be downloaded here |
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Download Complete Xilinx ISE WebPACK Projects to accompany Embedded Design Using Programmable Gate Arrays for the Spartan-3E Starter Board can be downloaded in ZIP archive format here (~30 MB, s3eEDPGA.zip). The ZIP archive files are password protected as described in Appendix A of the text.
Table of Contents
Chapter One Verilog Hardware Description Language
Programmable Logic Devices
Hardware Description Language
ABEL
Verilog
Verilog Syntax and Concepts
Number Formats
Signal Data Types
Strings and Arrays
Signal Operations
Arithmetic Operations
Structural Models in Verilog
Modules
Ports
Nested Modules
User Defined Primitives
Behavioral Models in Verilog
Continuous Assignment
Cyclic Behavior
Blocking and Non-Blocking Assignments
Control Flow
Functions and Tasks
Controller-Datapath Architecture
C to Verilog Translation
Arithmetic Functions
FPGA and Microprocessor Comparison
Summary
References
Chapter Two Verilog Design Automation
Xilinx ISE WebPACK
Project Creation
Project Implementation
Design Summary
Xilinx CORE Generator
LogiCORE Creation
Implementation Comparison
Xilinx Floorplanner
Xilinx Simulator
Xilinx Verilog Language Templates
Xilinx Architecture Wizard
Xilinx LogiCORE Blocks
Warnings and Errors in Synthesis
Summary
References
Chapter Three Programmable
Gate Array Hardware
Evaluation Boards
Basys Board
Spartan-3E Starter Board
Selection of an Evaluation Board
User Control File
Hardware Components and Peripherals
Crystal Clock Oscillator
Light Emitting Diodes
Push Buttons and Slide Switches
Rotary Shaft Encoder
Seven Segment Display
Liquid Crystal Display
PS/2
Keyboard Port
PS/2 Mouse Port
Digital-to-Analog
Converter
Spartan-3E
Starter Board DAC
Basys Board DAC
Analog-to-Digital Converter
Spartan-3E Starter Board
Preamplifier and ADC
Basys Board ADC
Auxiliary
Hardware
Auxiliary Hardware Peripherals
Summary
References
Chapter Four Digital Signal
Processing, Communications and Control
Sampling and Quantization
Discrete Time Sequences
Discrete Frequency Response
Analog Output
DSP Embedded System
IIR Digital Filter
FIR Digital Filter
FIR Compiler
DSP System
Wavefront DSP System
Implementations
Sine-Cosine Look-Up Table
DTMF Generator
Direct Digital Synthesis Compiler
Frequency Generator
Frequency Shift Keying
Phase Shift keying
Quaternary Phase Shift Keying
Linear Finite Shift Register
Data Communication
RS-232 Standard
Manchester Encoder-Decoder
Digital Control
Pulse Width Modulation
Servomotor Control
Summary
References
Chapter Five
Embedded Soft Core Processors
Programmable Gate Array Processors
Xilinx PicoBlaze Development Tools
Xilinx PicoBlaze Processor Architecture
Xilinx PicoBlaze Reference Projects
Initial Design
Programmable Amplifier and Analog-to-Digital Converter
Digital-to-Analog Converter
Frequency Generator
Frequency Counter
Pulse Width Modulation and Control
Soft-core Processors and Peripherals
Summary
References
Appendix
Project File Download